A technique for improving the performance of an integrated circuit formed on a substrate, such as a memory device, is to provide a separate bias potential to the substrate instead of coupling the substrate to a predetermined potential, usually the five volt power supply or a ground reference potential, as appropriate. The supply potential may be either a positive 5 volts or a negative 5 volts. The value of the bias potential may be more negative than either the ground reference potential or the negative 5 volts or more positive than the positive 5 volts, for either P-type or N-type substrate layers or wells.
The substrate bias potential is typically generated with an on-chip circuit containing a charge pump. When the substrate layer or well potential changes from a correct value due to leakage or a change in the operating condition of the integrated circuit, a sense element detects the change and provides an output signal to activate a charge pump. In turn, the charge pump pumps charge into or out of the substrate layer until the substrate layer or well potential returns to the correct value. The sense element then provides an output signal to deactivate the charge pump.
The bias generator includes a sense element having an input for sensing the potential of the substrate and an output that is coupled to an inverter. The inverter provides a control signal directly or indirectly to the charge pump. Normally a hysteresis circuit couples the control signal to the charge pump input. The charge pump activates and provides an output to the substrate layer or well that is desired to be regulated. The hysteresis circuit eliminates erratic switching.
Bias generator circuits draw a significant current that flows directly into or out of the substrate through the sense element. This current directly and indirectly increases the power requirements of the bias generator circuit; directly because of the power consumption due to the current flowing through circuit components and indirectly due to the added current requirements to compensate for the current flowing into or out of the substrate through the sense element. Normally, in the case of a negatively charged P-type substrate layer or well, the sense element current further raises the substrate potential. Therefore, the charge pump must be activated more frequently to maintain a nominal substrate potential. Conversely, in the case of a positively charged N-type substrate or well, the additional current depletes the substrate potential causing the charge pump to activate more frequently to maintain the higher potential.
A sense element 5 is shown in detail in the bias generator circuit 6 depicted in FIG. 1. The sense element 5 is a MOS, metal oxide semiconductor, diode series 10 connected directly to the substrate layer at a bias node 15 of the substrate layer. The MOS diode series 10 is connected to V.sub.CC 16 through a load element 20. The MOS diode series 10 and the load element 20 are connected at an intermediate node 25. The diode series 10 and the load element 20 are known as a level shifting circuit since the potential at the intermediate node 25 is dependent on the potential drop across the diodes series 10. As the bias node potential V.sub.BB increases, the intermediate node potential increases. Eventually, the intermediate node potential will be high enough to gate an inverter 30. The inverter 30 comprises an input switching N-type MOS, NMOS, field effect transistor, FET, 35 serially connected to a P-type MOS, PMOS, load FET 40 at the inverter output 45. Thus, a shift in the potential at the intermediate node from a low level to a high level causes the inverter to activate a charge pump 50 through the hysteresis circuit 55. Current flows continually in the sense element 5 to further increase the charge in the substrate layer; charge and current considered as positive values throughout this discussion. Consequently, the charge pump 50 is activated frequently in order to recharge the substrate layer to the correct level.
FIG. 2 is a timing diagram relating the bias node potential, V.sub.BB 60, to the charge pump input potential, ENV.sub.BB 65. The sense element provides an output signal, V.sub.1 70, at the intermediate node to the inverter input. The inverter output provides a control signal, V.sub.2 75. The control signal, V.sub.2 75, activates the charge pump through the hysteresis circuit. By analyzing ENV.sub.BB 65 it can be seen that the charge pump is activated every 2.8 microseconds when ENV.sub.BB goes high.
Since the charge pump is typically 25-35% efficient, an additional 1 microamp (.mu.A) of current flowing in the sense element translates to an additional 3-4 .mu.A of current that must be consumed by the charge pump. Typically, 5 .mu.A of current is required by the sense element to maintain a reasonably short delay time to respond to changes in the substrate potential. Thus, a total of 20-25 .mu.A of additional current is consumed by the bias generator circuit.
One simple way to reduce the current requirements of the bias generator circuit is to decrease the current flowing through the sense element by increasing the value of the load element. Such a decrease in current, however, produces a corresponding undesirable increase in the delay time in response to changes in the substrate potential. Thus, the accuracy of the regulated substrate potential decreases resulting in decreased performance and, possibly, latch-up of the integrated circuit.
What is desired is a bias generator circuit for regulating the potential of a substrate on an integrated circuit having a low current requirement yet maintaining a reasonable delay time in responding to changes in the substrate potential.